Makefile-first exploration## 1. Commonly used predefined variables¶


$*	Target file name without extension
$+	All dependent files, separated by spaces, in order of appearance
$<	The name of the first dependent file
$?	All dependent files, separated by spaces, with modification dates later than the target's creation date
$@	The full name of the target
$^	All dependent files, separated by spaces, do not contain duplicate dependent files
$%	If the target is an archive member, this variable represents the archive member name of the target

2. Preliminary knowledge¶

Link: Link multiple .o files, or .o files and library files into an executable program that can be executed by the operating system- Static library: document file, a collection of multiple .o files; the suffix in Linux is .a; maintained and managed using the ar tool- Shared library: a collection of multiple .o files, generated by the compiler in a special way, usually executable in Linux; dynamically loaded into memory; multiple executable programs can share the code segment of the library file

3. Makefile rules```¶

TARGET…:PREREQUISITES…  
COMMAND  
…

``` - TARGET: The target of the rule, the final file name & the intermediate process file name; it can be the name of the action executed by make- PREREQUISTIES: rule dependencies, generating a list of file names required by the rule target- COMMAND: The command line of the rule; each command must start with [Tab], but not everything starting with [Tab] is a command; make will process all lines starting with [Tab] after the first rule as a command line

4. make execution- The first rule of the Make file is executed by default, and the first target of this rule becomes the "final destination"- Makefile will only perform compilation of dependencies required for the final goal¶

5. Write the rules¶

(1). Try to write with a single target and multiple dependencies.### (2). 5 contents included in Makefile¶

a. Display rules¶

How to update one or more target files under what circumstances#### b. Implicit rules
According to the rules automatically derived from a type of target file, dependent files are automatically generated according to the file suffix name and the target is updated using default commands.#### c. Variable definition#### d. indicator
Specify the actions that need to be performed when the make program reads the makefile, including:
Read the specified file as part of the makefile- > Decide to process or ignore a specific part of the Makefile- > Define a multi-line variable#### e. Comments
The content after the # character is used as a comment### (3). Naming of makefile files
make will search in the following order- GNUmakfile->makefile->Makefile- When it is not the above file name, you can specify the makefile read by make through "-f" or "--file"; multiple makefile files will be in the specified order.### (4). Include other makefile files
Use include:Include FILENAMES
FILENAMES is the file name supported by the shell, and wildcards can be used;- Must not start with [Tab]- The default search path for files not found is: "./usr/gnu/include /usr/local/include /usr/include"; make will use rules to create files specified by the inlcude directive but not found

(5). Makefile file analysis¶

The first stage: read all makefile files and resume the dependency structure linked list between all targets and dependencies- Phase 2: Based on the relationship structure linked list in the first phase, determine which targets need to be updated and reconstructed

6. Variable value## (1). Variable definition parsing rules:```¶

IMMEDIATE = DEFERRED IMMEDIATE ?= DEFERRED IMMEDIATE := IMMEDIATE IMMEDIATE += DEFERRED or IMMEDIATE Define IMMEDIATE

DEFERRED
Endef

- Conditional statement: make expands the branch with correct preset conditions- Definition of rules: When make is executed, all rules are expanded according to the following pattern:    
If the target and dependency in the rule refer to other variables, they will be expanded immediately; while the variables in the rule command line will be expanded later.    
## 7. Makefile rule syntax    
### (1). Grammar format:### (2). TARGETS can be multiple file names separated by spaces, and wildcards can be used.### (3). A(M) represents the member M of the archive file;### (4). Usually the target has only one target file### (5). Writing rules        
- The command can be on the same line as the command, separated by ";"- The command is on the next line of the dependency description. As an independent command line, it must start with [Tab].- $ in Makefile has a special meaning (indicating a reference to a variable or function). You need to use the symbol $ in the rules and write consecutive $$- For longer lines, you can use \ to branch### (6). Dependency type#### a. Regular dependencies            
- The order in which the rules need to be executed to rebuild the target- In what order and commands should you follow to rebuild dependency files?#### b. order-only dependency            
- Dependencies for updating dependencies- Start with the pipe symbol "|" as a dependency file of the target:```
 TARGETS:NORMAL-PREREQUISITES|ORDER-ONLY-PREREQUISITES

- Regular dependency files can be empty; the same dependency appearing in both regular and order-only will be treated as regular### (7). Use wildcard characters in file names

a. The wildcard characters are exactly the same as those of the linux shell.#### b. Usage occasions¶

The target and dependency of the rule- Appears in the command of the rule and is executed in the shell#### c. wildcard function
$(wildcard .c) gets the .c file list- $(patsubst %.c,%.o,$(wildcard .c))--Replace the .c file list with .o### (8). Command line and search directory
Use automation variables- > $^ represents the full pathname of all dependent files obtained through directory search- > $@ represents the target of the rule- > $< The first dependent file in the dependent file list obtained through directory search### (9). Library files and search directories
Specify the dependency file name "-lNAME"## 8. Variables

(1). Variable rules#### a. Use "=" or "define" to define#### b. Can be used to represent:- file name- compile options- Program running options parameters- Search directory listing for source files- Compile output directory#### c. Variable names do not include: ":", "#", "="#### d. Variable names are case sensitive#### e. Automation variables### (2). Variable reference¶

Use "$()" or "${}"- If "$" needs to be expressed, "$$" should be used.### (3). Variable definition
Recursive expansion variable "=" definition- Direct expansion variable ":=" definition- Define space "space:=$(nullstring)"- Conditional assignment operator: "?="### (4). Advanced usage
"$(VAR:A,B)" replaces the words ending with "A" characters with "B"; same as patsubst### (5). Append variable value
"objects += another.o"### (6).override indicator

"override VARIABLE = VALUE"### (7). Target specified variable## 9. Conditional judgment```
Ifeq($(CC),gcc) $(CC) -o foo $(objects) $(lib) Endif

- Keywords- >Ifeq- >Ifned- >Ifdef- >Ifndef
## 10. Make’s inline functions    
### (1). Text processing function        
    1. $(subst FROM,TO,TEXT) replaces FROM in TEXT with TO    2. $(patsubst PATTERN,REPLACEMENT,TEXT) searches for words separated by spaces in TEXT and replaces those matching PATTERN with REPLACEMENT    3. $(strip STRINT) removes leading and trailing spaces    4. $(findstring FIND,IN) finds the FIND string in IN    5. $(sort LIST) sorts the words in LIST in alphabetical order    6. $(word N,TEXT) to get the Nth word in TEXT    7. $(wordlist S,E,TEXT) takes the word string from S to E from TEXT    8. $(words TEXT) counts the number of words in TEXT    9. $(firstword NAMES) takes the first word in NAMES### (2). File name processing function        
    1. $(dir NAMES) takes the directory part of the file name    2. $(notdir NAMES) takes the non-directory part of the file name    3. $(suffix NAMES) takes the file name suffix    4. $(addsuffix SUFFIX,NAMES) adds the suffix SUFFIX to each item of NAMES    5. $(addprefix PREFIX,NAMES) Add prefix PREFIX to NAMES    6. $(join LIST1,LIST2) connects two strings (corresponding index connection between lists)    7. $(wildcard PATTERN) lists the file names in the current directory that match the PATTERN format### (3). foreach function    1. $(foreach VAR,LIST,TEXT) assigns the words in LIST to VAR in sequence, and then executes the TEXT expression### (4). if function    1. $(if CONDITION,THEN-PART [,ELSE-PART])### (5). call function### (6). value function### (7). eval function### (8). origin function### (9). shell function### (10). Make control function    1. $(error TEXT)    2. $(warning TEXT)## 11. Execute make
### (1). Directly execute make### (2). Specify the makefile "make -f MAKEFILE"### (3). Specify the ultimate goal    1. first goal of first rule    2. The command line specifies the target name in the makefile as the target "make TARGET_NAME"    3. Execution of alternative commands    4. Prevent specific files from being rebuilt    5. Replace variable definition    6. Use make to compile and test: "make -k"## 12. Implicit rules of make    1. Use of implicit rules        1. make will start the corresponding implicit rules based on the source file type        2. There is always a target pattern and dependency pattern for implicit rules;        3. The same target mode can correspond to multiple dependency modes    2. pattern matching    3. universal rules    4. Rebuild embedded implicit rules    5. Default rules    6. Suffix rules    7. Implicit rule search algorithm    8. make automation variables|   |   |
|---|---|
|$@|The target file name of the rule|
|$%|a member of a static library|
|$<|The first dependent file name of the rule|
|$?|List of all dependent files that are newer than the target file|
|$^|List of all dependent files of the rule|
|$+|Similar to $^, keep duplicate files|
|$(@D)|directory part of target file|
|$(@F)|Target file except directory part|
## 13. Basic conventions of makefiles    
 1. The makefile should contain "SHELL=/bin/sh" 2. Explicitly qualify recognized suffixes```
.SUFFIXES:  
.SUFFIXES: .c .o

Be careful with paths in rules